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HD74HC597
8-bit Latch / Shift Register
REJ03D0635-0200 (Previous ADE-205-515) Rev.2.00 Mar 30, 2006
Description
The HD74HC597 consists of an 8-bit storage latch feeding a parallel-in, serial-out 8-bit shift register. Both the storage register and shift register have positive-edge triggered clocks. The shift register also has direct load (from storage) and clear inputs.
Features
* High Speed Operation: tpd (SCK to QH') = 14 ns typ (CL = 50 pF) * High Output Current: Fanout of 10 LSTTL Loads * Wide Operating Voltage: VCC = 2 to 6 V * Low Input Current: 1 A max * Low Quiescent Supply Current: ICC (static) = 4 A max (Ta = 25C) * Ordering Information
Part Name HD74HC597P HD74HC597FPEL HD74HC597RPEL Package Type DILP-16 pin SOP-16 pin (JEITA) SOP-16 pin (JEDEC) Package Code (Previous Code) PRDP0016AE-B (DP-16FV) PRSP0016DH-B (FP-16DAV) PRSP0016DG-A (FP-16DNV) P FP RP Package Abbreviation -- EL (2,000 pcs/reel) EL (2,500 pcs/reel) Taping Abbreviation (Quantity)
Note: Please consult the sales office for the above package availability.
Function Table
Inputs RCK SCK X X X X X SLoad X L L L H H SCLR X H H L L H Function Data loaded to input latches Data loaded from inputs to shift register Data transferred from input latches to shift register Invalid logic, state of shift register indeterminate when signals removed Shift register cleared Shift register clocked Qn = Qn - 1, QA = SER
X X X X
Rev.2.00 Mar 30, 2006 page 1 of 9
HD74HC597
Pin Arrangement
B1 C2 D3 E4 F5 G6 H7 GND 8 (Top view) 16 VCC 15 A 14 SER 13 S Load 12 RCK 11 SCK 10 SCLR 9 Q'H
Logic Diagram
SCLR SLoad RCK SER SCK
A
DQ C
SC D Q R
B
DQ C
SC D Q R
C D E F G H
DQ C SC D Q R
Q'H
Rev.2.00 Mar 30, 2006 page 2 of 9
HD74HC597
Absolute Maximum Ratings
Item Supply voltage range Input / Output voltage Input / Output diode current Output current VCC, GND current Power dissipation Symbol VCC VIN, VOUT IIK, IOK IOUT ICC or IGND PT Ratings -0.5 to 7.0 -0.5 to VCC +0.5 20 25 50 500 Unit V V mA mA mA mW
Storage temperature Tstg -65 to +150 C Note: The absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
Recommended Operating Conditions
Item Supply voltage Input / Output voltage Operating temperature Input rise / fall time Note:
*1
Symbol VCC VIN, VOUT Ta tr , tf
Ratings 2 to 6 0 to VCC -40 to 85 0 to 1000 0 to 500
Unit V V C ns
Conditions
VCC = 2.0 V VCC = 4.5 V VCC = 6.0 V
0 to 400 1. This item guarantees maximum limit when one input switches. Waveform: Refer to test circuit of switching characteristics.
Electrical Characteristics
Item Input voltage Symbol VCC (V) VIH 2.0 4.5 6.0 2.0 4.5 6.0 Output voltage VOH 2.0 4.5 6.0 4.5 VOL 6.0 2.0 4.5 6.0 4.5 6.0 Input current Quiescent supply current Iin ICC 6.0 6.0 Min 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.18 5.68 -- -- -- -- -- -- -- Ta = 25C Typ Max -- -- -- -- -- -- 2.0 4.5 6.0 -- -- 0.0 0.0 0.0 -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.26 0.26 0.1 4.0 Ta = -40 to+85C Unit Min Max 1.5 3.15 4.2 -- -- -- 1.9 4.4 5.9 4.13 5.63 -- -- -- -- -- -- -- -- -- -- 0.5 1.35 1.8 -- -- -- -- -- 0.1 0.1 0.1 0.33 0.33 1.0 40 IOL = 4 mA IOL = 5.2 mA A Vin = VCC or GND A Vin = VCC or GND, Iout = 0 A V V Vin = VIH or VIL IOH = -20 A V Test Conditions
VIL
V
IOH = -4 mA IOH = -5.2 mA Vin = VIH or VIL IOL = 20 A
Rev.2.00 Mar 30, 2006 page 3 of 9
HD74HC597
Switching Characteristics (CL = 50 pF, Input tr = tf = 6 ns)
Ta = 25C Item Maximum clock frequency Propagation delay time Symbol VCC (V) fmax 2.0 4.5 6.0 tPLH tPHL 2.0 4.5 6.0 2.0 4.5 6.0 Removal time trem 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 2.0 4.5 6.0 Hold time th 2.0 4.5 6.0 2.0 4.5 6.0 Pulse width tw 2.0 4.5 6.0 2.0 4.5 6.0 -- Min -- -- -- -- -- -- -- -- -- 100 20 17 100 20 17 100 20 17 100 20 17 5 5 5 5 5 5 80 16 14 -- -- -- -- Typ -- -- -- -- 14 -- -- 17 -- -- -- -- -- -- -- -- 1 -- -- 0 -- -- -- -- -- -- -- -- 7 -- -- 4 -- 5 Max 5 27 31 175 35 30 210 42 36 -- - -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 75 15 13 10 Ta = -40 to +85C Min -- -- -- -- -- -- -- -- -- 125 25 21 125 25 21 125 25 21 125 25 21 5 5 5 5 5 5 100 20 17 -- -- -- -- Max 4 21 24 220 44 37 265 53 45 -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 95 19 16 10 pF ns ns SCK to SA ns SER to SCK ns ns SCK or SLoad or SCLR to QH' Unit MHz Test Conditions
ns
RCK to QH'
Setup time
tsu
ns
RCK to SCK
ns
Data to RCK
ns
LCK to Data
Output rise/fall time Input capacitance
tTLH tTHL Cin
ns
Rev.2.00 Mar 30, 2006 page 4 of 9
HD74HC597
Test Circuit
VCC VCC Output Input
See Function Table
SCLR SLoad RCK A to H SER SCK
QH' CL = 50pF
Pulse Generator Zout = 50 Input Pulse Generator Zout = 50
Note : 1. CL includes probe and jig capacitance.
Waveforms
* Waveform - 1 (RCK to QH')
tr Input RCK
10 % 90 % 50 % 50 %
tf VCC
50 % 10 %
tw(H) t PLH
90 %
tw(L) t PHL
90 % 50 % 10 %
0V
VOH VOL
Output QH'
50 % 10 %
t TLH
t THL
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
* Waveform - 2 (RCK to Q)
tr Input SCK
10 % 90 % 50 % 50 %
tf VCC
50 % 10 %
tw(H) t PLH
90 %
tw(L) t PHL
90 % 50 % 10 %
0V
VOH VOL
Output QH'
50 % 10 %
t TLH
t THL
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
Rev.2.00 Mar 30, 2006 page 5 of 9
HD74HC597
* Waveform - 3 (SCLR to QH')
tf Input SCLR
90 % 50 % 10 % 10 %
tr
90 % 50 %
VCC 0V
tw t PHL
90 %
VOH
50 % 10 %
Output QH'
VOL t rem
90 %
t THL Input SCK
VCC 0V
50 % 10 %
t TLH Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
* Waveform - 4 (SLoad to QH')
tf Input SLoad
90 % 50 % 10 %
tr
90 % 50 % 10 %
VCC
50 %
tw t PHL
90 %
0V t PLH
90 %
VOH VOL
Output QH'
50 % 10 %
50 % 10 %
t THL
t TLH
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
Rev.2.00 Mar 30, 2006 page 6 of 9
HD74HC597
* Waveform - 5 (Data to RCK)
tr/tf Input A to H
90 % 50 % 10 % 90 % 50 % 10 % 90 % 50 % 10 %
tr/tf
90 % 50 % 10 %
VCC 0V VCC
10 %
t su Input RCK
th
90 % 90 %
50 % 10 %
0V
tr
tf
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
* Waveform - 6 (SER to SCK)
tr/tf Input SER
90 % 50 % 10 % 90 % 50 % 10 % 90 % 50 % 10 %
tr/tf
90 % 50 % 10 %
VCC 0V VCC
10 %
t su Input SCK
th
90 % 90 %
50 % 10 %
0V
tr
tf
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
* Waveform - 7 (SLoad to SCK)
tr Input SLoad
10 % 90 % 50 % 90 % 50 % 10 %
tf VCC 0V VCC
10 %
t su Input SCK
th
90 % 90 %
50 % 10 %
0V
tr
tf
Note : 1. Input waveform : PRR 1 MHz, duty cycle 50%, tr 6 ns, tf 6 ns
Rev.2.00 Mar 30, 2006 page 7 of 9
HD74HC597
Package Dimensions
JEITA Package Code P-DIP16-6.3x19.2-2.54 RENESAS Code PRDP0016AE-B Previous Code DP-16FV MASS[Typ.] 1.05g
D
16
9
1 0.89 b3
8
Z
A1
A
E
Reference Symbol
Dimension in Millimeters
Min
e
bp
e1
c
( Ni/Pd/Au plating )
e1 D E A A1 bp b3 c e Z L
Nom Max 7.62 19.2 20.32 6.3 7.4 5.06
L
0.51 0.40 0.48 0.56 1.30 0.19 0.25 0.31 0 15 2.29 2.54 2.79 1.12 2.54
JEITA Package Code P-SOP16-5.5x10.06-1.27
RENESAS Code PRSP0016DH-B
Previous Code FP-16DAV
MASS[Typ.] 0.24g
*1
D F 9
16
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
HE
E
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
8 bp x M L1
Reference Symbol
c
Dimension in Millimeters
A1
y
L
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 10.06 10.5 5.50 0.00 0.10 0.20 2.20 0.34 0.40 0.46 0.15 0.20 0.25 0 8 7.50 7.80 8.00 1.27 0.12 0.15 0.80 0.50 0.70 0.90 1.15
Rev.2.00 Mar 30, 2006 page 8 of 9
A
HD74HC597
JEITA Package Code P-SOP16-3.95x9.9-1.27 RENESAS Code PRSP0016DG-A Previous Code FP-16DNV MASS[Typ.] 0.15g
*1
D 9
F
16
NOTE) 1. DIMENSIONS"*1 (Nom)"AND"*2" DO NOT INCLUDE MOLD FLASH. 2. DIMENSION"*3"DOES NOT INCLUDE TRIM OFFSET.
bp
E HE
Index mark
*2
Terminal cross section ( Ni/Pd/Au plating )
1 Z e
*3
c
8 bp x M L1
Reference Symbol
Dimension in Millimeters
A1
L
y
Detail F
D E A2 A1 A bp b1 c c1 HE e x y Z L L1
Min Nom Max 9.90 10.30 3.95 0.10 0.14 0.25 1.75 0.34 0.40 0.46 0.15 0.20 0.25 0 8 5.80 6.10 6.20 1.27 0.25 0.15 0.635 0.40 0.60 1.27 1.08
Rev.2.00 Mar 30, 2006 page 9 of 9
A
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